| PART |
Description |
Maker |
| PI6C4853111FAE PI6C4853111 PI6C4853111FAEX |
6C SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
2.5V/3.3V 500MHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer with 2 to 1 Differential Clock Input Mux
|
Pericom Semiconductor Corporation
|
| MC100LVE210FN MC100E210FN MC100LVE210 |
Low-voltage dual 1:4,1:5 differential fanout buffer ECL/PECL compatible
LOW VOLTAGE DUAL 1:4 / 1:5 DIFFERENTIAL FANOUT BUFFER
LOW VOLTAGE DUAL 1:4, 1:5 DIFFERENTIAL FANOUT BUFFER 100E SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
|
Motorola, Inc
Motorola Mobility Holdings, Inc.
|
| NB6L11MMNR2G NB6L11MMNG |
2.5V / 3.3V 1:2 Differential CML Fanout Buffer 6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16
|
ON Semiconductor
|
| MC100LVE210FNR2G |
3.3V ECL Dual 1:4, 1:5 Differential Fanout Buffer 100LVE SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28
|
ON Semiconductor
|
| MC100EP16VA MC100EP17 MC100EP29 MC100EP35 MC100EP4 |
3.3V / 5V ECL Differential Receiver/Driver with High Gain
3.3V / 5V ECL Quad Differential Driver/Receiver
3.3V / 5V ECL Dual Differential Data and Clock D Flip?Flop With Set and Reset
3.3V / 5V ECL JK Flip?Flop
3.3V/5V ECL 8?Bit Serial/Parallel Converter
3.3V / 5V ECL Differential Data and Clock D Flip?Flop
3.3V / 5V ECL 4:1 Differential Multiplexer
3.3V / 5V ECL 2:1 Multiplexer
9?Bit TTL to ECL Translator
3.3V / 5V ECL 8?Bit Synchronous Binary Up Counter
3.3V / 5V ECL 2?Input Differential AND/NAND
3.3V / 5V ECL Quad 4?Input OR/NOR
3.3V / 5V ECL Quad 2?Input Differential AND/NAND
3.3 V / 5 V Hex Differential Line Receiver/Driver
3.3V / 5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 卤2/4, 卤4/5/6 Clock Generation Chip
3.3V / 5V ECL Differential Receiver/Driver with Internal Termination
3.3V ECL Programmable Delay Chip
3.3V / 5V ECL D Flip?Flop with Set and Reset
3.3V / 5V ECL 卤2 Divider
3.3V / 5V ECL 卤4 Divider
3.3 V/5 V 8-Bit CMOS/ECL/TTL Data Input Parallel/Serial Converter
3.3V / 5V ECL 6?Bit Differential Register with Master Reset
3.3V / 5V ECL D Flip?Flop with Reset and Differential Clock
3.3V / 5V ECL Dual Differential 2:1 Multiplexer
3.3V / 5V ECL Coaxial Cable Driver
?3.3V / ?5V Triple ECL Input to LVPECL/PECL Output Translator
3.3V LVTTL/LVCMOS to Differential LVPECL Translator
|
ONSEMI[ON Semiconductor]
|
| SY89808L SY89808LTITR SY89808LTI SY89808LTG SY8980 |
3.3V, 500MHz, 1:9 DIFFERENTIAL HSTL (1.5V) FANOUT BUFFER/TRANSLATOR 89808 SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
|
Micrel Semiconductor, Inc.
|
| MC100EL51DG MC100EL51DR2G MC100EL51DT MC100EL51DTG |
5V ECL Differential Clock D Flip-Flop 10EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, DSO8
5V ECL Differential Clock D Flip-Flop 10EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
5V ECL Differential Clock D Flip-Flop; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 10EL SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
5V ECL Differential Clock D Flip-Flop(5V ECL 差分时钟D触发
|
ONSEMI[ON Semiconductor]
|
| LT1994CDDTR LT1994IMS8 |
Low Noise, Low Distortion Fully Differential Input/Output Amplifier/Driver; Package: DFN; No of Pins: 8; Temperature Range: 0°C to 70°C OP-AMP, 3000 uV OFFSET-MAX, 70 MHz BAND WIDTH, PDSO8
Low Noise, Low Distortion Fully Differential Input/Output Amplifi er/Driver
|
Linear Technology, Corp.
|
| MAX9311ECJ-T |
1:10 Differential LVPECL/LVECL/HSTL Clock and Data Drivers 9311 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
|
Maxim Integrated Products, Inc.
|
| MAX9312 MAX9312ECJ MAX9312ETJ MAX9314 MAX9314ECJ |
Dual 1:5 Differential LVPECL/LVECL/HSTL Clock and Data Drivers ECL SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
|
Maxim Integrated Products, Inc.
|
| AD6630 AD6630AR AD6630AR-REEL AD6630PCB AD6630R AD |
Differential, Low Noise IF Gain Block with Output Clamping 微分，中频增益低噪声块与输出钳位
Differential/ Low Noise IF Gain Block with Output Clamping
|
Analog Devices, Inc.
AD[Analog Devices]
|
